Compute express link (CXL) technology is rushing onto the scene with a goal of changing the very nature of computer architecture. Not only does this interface support memory disaggregation, persistent memory, and nonuniform memory architectures (NUMA), but it also is being used to standardize the interface between chiplets, which should improve processor cost/performance while creating more diversity in processor types.
Members of the storage and computing communities must understand CXL if they want to keep up with tomorrow’s most productive computing configurations.
This presentation will begin with a brief CXL tutorial, to explain what it is and why it is needed, and then moves to use cases and the various configurations that the new protocol supports. Attendees will learn:
- Why CXL came into being, and what memory models it supports.
- The problem of “stranded” memory, and how CXL addresses it.
- How CXL benefits the adoption of storage class memory.
- CXL’s use in the UCIe chiplet interface.
- What storage admins must prepare for as CXL rolls out.
About the speaker:
Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is highly respected for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media. He posts blogs at www.TheMemoryGuy.com, and www.TheSSDguy.com.